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Overview
Comment:Merge 6.4a: virtual interrupts on Arm

Reviewed against docs/tasks/6.4a.md; verdict merge, after a review-fix check-in (2243398456): the timer line's spec accepts 10-20 ms, since QEMU under load measured 11 ms; and Vcpu.boot, pushed to 2,616 bytes, is split so no Vcpu function exceeds 2 KiB (largest now serve_devices, 2,044 bytes on aarch64, close to the limit). The guest gets an emulated GICv3 distributor and redistributor; Glint injects through list registers; virtio-mmio raises INTID 48; the guest's wfi waits for an interrupt; the virtual timer's PPI 27 is linked to the guest through the list register's hardware bit, so the guest's EOI deactivates the physical interrupt. (i) is 394 changed non-spec lines, at the 400 stop; (ii) 170. The reviewer booted the guest in BQ2's seed: seven guest lines in order, including 'virtio interrupt 48 received' and 'timer interrupt 27 after 10 ms', then 'VM: guest memory 32 KiB backed'; exit 0.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX

Downloads: Tarball | ZIP archive
Timelines: family | ancestors | descendants | both | trunk
Files: files | file ages | folders
SHA3-256: ad8bd3d14fc6d9d32ba938630e34bdaa9bce86704de78eb688405f80d793f84a
User & Date: x86-1-glint 2026-11-11 03:50:31.284
Context
2026-11-11
03:50
docs/boots: virtual interrupts on aarch64, recorded

Claim: the boots page gains 6.4a: the guest takes a virtio interrupt and a timer interrupt through its own virtual GIC. Passage: the maintainer's request for a recording at each milestone (ocx-console 40c80385db). Demonstration: the cast is the file bin/glint-run wrote on x86-1 at the merge ad8bd3d14f's tree, built inside BQ2's seed; it exited 0 with the lines the entry quotes. Size: one cast, one page entry.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX check-in: 88ad8145df user: x86-1-glint tags: trunk

03:50
Merge 6.4a: virtual interrupts on Arm

Reviewed against docs/tasks/6.4a.md; verdict merge, after a review-fix check-in (2243398456): the timer line's spec accepts 10-20 ms, since QEMU under load measured 11 ms; and Vcpu.boot, pushed to 2,616 bytes, is split so no Vcpu function exceeds 2 KiB (largest now serve_devices, 2,044 bytes on aarch64, close to the limit). The guest gets an emulated GICv3 distributor and redistributor; Glint injects through list registers; virtio-mmio raises INTID 48; the guest's wfi waits for an interrupt; the virtual timer's PPI 27 is linked to the guest through the list register's hardware bit, so the guest's EOI deactivates the physical interrupt. (i) is 394 changed non-spec lines, at the 400 stop; (ii) 170. The reviewer booted the guest in BQ2's seed: seven guest lines in order, including 'virtio interrupt 48 received' and 'timer interrupt 27 after 10 ms', then 'VM: guest memory 32 KiB backed'; exit 0.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX check-in: ad8bd3d14f user: x86-1-glint tags: trunk

03:49
6.4a review: tolerate measured timer delay and split Vcpu.boot below 2 KiB

Claim: The Arm boot specs accept only integer measured timer times from 10 through 20 ms, with a comment explaining QEMU scheduling under load. All other expected lines remain exact and ordered; the guest still prints measured milliseconds. Vcpu.boot separates CPU creation/freeing, stack-owned device setup/serving and Arm GIC registration without changing guest behavior, registration order or device lifetimes. Every emitted function from boot/vcpu.cr is below 2 KiB on both architectures.

Passage: docs/tasks/6.4a.md review fixes and docs/phases/06-interrupts-drivers.md slice 6.4a; Hailperin 7.5.2, paraphrased because its text is absent: the hypervisor delivers interrupts through the guest's ordinary hardware interface. This preserves that interface and the existing timer implementation; only the measured-time assertion and host function boundaries change.

Demonstration: In docs/tasks/4.1a.md's exact BQ2 seed namespace/environment, with cd /workspace/v54: bin/glint-build aarch64 succeeds; crystal spec spec/run --example aarch64: 34 examples, zero failures/errors/pending. crystal spec spec/vgic_spec.cr spec/virtio_mmio_spec.cr spec/gic_spec.cr spec/image_initialization_spec.cr spec/efi_image_spec.cr spec/small_target_spec.cr: 22 examples, zero failures/errors/pending. Then outside the seed, with ZEPHYR_SRC=/workspace/src/zephyr-src QEMU_SRC=/workspace/src/qemu-11.1.2 UBOOT_SRC=/workspace/src/u-boot-2026.07 GLINT_UBOOT_BUILD_DIR=build/uboot LD_LIBRARY_PATH=/workspace/seed/rootfs/usr/lib64: bin/glint-build x86_64 succeeds; crystal spec spec/run --example x86_64: 31 examples, zero failures/errors/pending. The boot suites ran sequentially. Outside the seed with ZEPHYR_SRC set and QEMU_SRC/UBOOT_SRC unset, crystal spec: 1396 examples, zero failures/errors, 61 pending for unavailable architecture/source tools. crystal tool format --check passes. Multiline regex boundary checks accept exactly 10..20 and reject prefix/suffix text. No Python used.

Size: 53 inserted, 45 deleted non-spec lines; only boot/vcpu.cr and the two boot specs changed. llvm-nm -S --size-sort -C build/aarch64/glint.so (inside seed): Vcpu.boot 0x118 = 280 bytes, serve_devices 0x7fc = 2044, register_gic 0x19c = 412. Same command for build/x86_64/glint.so outside seed: boot 0x401 = 1025 bytes, serve_devices 0x736 = 1846; no Arm helper emitted. All 30 Arm and 26 x86 Vcpu symbols checked: maxima 2044/1846 bytes, none over 2048. EFI sizes unchanged: Arm 263168 -> 263168 bytes; x86 258560 -> 258560 bytes. No heap or startup initializers added; image and small-target checks pass.

Signed-off-by: Codex <noreply@openai.com> Leaf check-in: 2243398456 user: x86-1-glint tags: slice/6.4a

02:49
docs/tasks/6.4a.md: virtual interrupts on Arm

Claim: the task for 6.4a in two check-ins: (i) an emulated GICv3 distributor and redistributor for the guest, list-register injection through one call, virtio-mmio raising INTID 48, wfi as a wait for an interrupt, and the test guest taking the interrupt through its own vector; (ii) the guest's virtual timer on PPI 27. Passage: docs/phases/06-interrupts-drivers.md, slice 6.4a; Hailperin 7.5.2. Demonstration: the values named are cited to QEMU 11.1.2: gicv3_internal.h:202-222 (ICH_VMCR_EL2, ICH_HCR_EL2), virt.c:271 (virtio-mmio interrupts from SPI 16). Size: one task file.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX check-in: a3bf5562eb user: x86-1-glint tags: trunk

Changes
Unified Diff Side-by-Side Diff Patch
Changes to boot/el2.cr.
Changes to boot/gic.cr.
Changes to boot/vcpu.cr.
Added boot/vgic.cr.
Changes to boot/virtio_mmio.cr.
Changes to c/gic.c.
Changes to guest/test/README.md.
Changes to guest/test/call_aarch64.S.
Changes to guest/test/main.cr.
Changes to spec/run/pl011_spec.cr.
Changes to spec/run/virtio_console_spec.cr.
Changes to spec/run/xhci_spec.cr.
Added spec/vgic_spec.cr.
Changes to spec/virtio_mmio_spec.cr.