Claim: the boots page gains 5.2/5.3's milestone. The test guest prints through a 16550 at port 0x3f8, emulated by Glint's device dispatcher, and keeps one line on the console call.

Passage: the maintainer's 'more ascii animations of glint as it progresses, please' (ocx-console 40c80385db).

Demonstration: the cast is the file bin/glint-run wrote on x86-1 at trunk 90f09b3221 for the command in its entry, which exited 0. Its log shows the guest's lines in order and 'VM: guest powered off'.

Size: one cast, one entry in boots.js.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX check-in: da450afda5 user: x86-1-glint tags: trunk

Claim: Glint::Uart16550 is enough of a 16550 for a polling guest, registered with 5.2's dispatcher at ports 0x3f8-0x3ff in hypervisor mode. THR writes go to Glint's console through 4.5's filter. LSR always reports THRE and TEMT, and IIR reads no interrupt pending. IER, LCR, MCR, SCR and the divisor latches (under DLAB) hold what was written, and RBR reads 0 with data-ready clear; input comes in Phase 6. The test guest now writes its lines through the UART, polling LSR and then writing THR. It keeps one line on GLINT_CONSOLE_WRITE, 'test guest: console call works', so 4.4's path stays tested. guest/test/README.md documents both.

Passage: Hailperin §7.5.2, paraphrased: a trapped device access becomes emulation. Phase 5's demo: the test guest prints through the emulated UART.

Demonstration: on x86-1, bin/glint-run x86_64 --mode hypervisor --guest build/x86_64/guest/test.efi printed 'test guest: started' and 'test guest: PSCI version 0x0000000000000002' through the UART, then 'test guest: console call works' through the call, then 'VM: guest powered off' and the prompt. spec/uart16550_spec.cr drives the model over a fake console: THR filtering, LSR, DLAB, IIR. spec/run/uart16550_spec.cr checks the boot's order. With the dispatcher, vcpu, guest-call, guest-build and image-check specs and the phase 4, 5.1 and vcpu boots: 47 examples, 0 failures, 4 pending (aarch64). The 16550 register layout follows QEMU 11.1.2 hw/char/serial.c. Codex wrote it from docs/tasks/5.2.md; the reviewer made no changes. Review notes: each guest byte costs at least two VM exits (LSR poll, THR write) against 4.4's limit of 1000, which a chattier guest will reach. And Vcpu#serve tests the SVM exit code 0x7b directly; 4.3a should move that behind the vCPU's reason.

Size: +104/-4 non-spec lines; largest newly linked function Devices.register, 1,554 bytes; BOOTX64.EFI 201,216 to 209,408 bytes.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX Leaf check-in: 4a2fb0fb6a user: x86-1-glint tags: slice/5.2-5.3-x86_64

Claim: docs/tasks/5.2.md hands out 5.2 (a fixed, heap-free table of device ranges in two spaces, guest-physical and I/O ports, with dispatch) and 5.3 (a polling 16550 at 0x3f8), as two check-ins on one branch. The test guest prints through the UART, keeping one line on GLINT_CONSOLE_WRITE. On x86_64 only the port space is used: a memory access of unknown size is refused, not guessed, until the maintainer answers glint b142e85cea.

Passage: docs/WORKFLOW.md, Handing out a slice, step 1.

Demonstration: QEMU 11.1.2 svm.h lines 30-39 give the IOIO exit-info bits, and svm_helper.c lines 718-725 put the next RIP in EXITINFO2 and the port in bits 16-31.

Size: one new task.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX check-in: 0ba99577e6 user: x86-1-glint tags: trunk