Claim: docs/tasks/4.4.md has Glint run the guest in a bounded loop and dispatch each call by SMCCC function number through the vCPU interface only, so the aarch64 half reuses it. PSCI VERSION answers 0.2, SYSTEM_OFF stops the guest, GLINT_CONSOLE_WRITE copies the guest's text out through translate (refusing ranges outside guest RAM, wrapping or over a cap), and anything else gets NOT_SUPPORTED. The boot spec is the phase demo for x86_64.

Passage: docs/WORKFLOW.md, Handing out a slice, step 1.

Demonstration: the PSCI IDs and return codes named are U-Boot 2026.07 include/linux/psci.h's.

Size: one new task.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX check-in: 8a2d929623 user: x86-1-glint tags: trunk

Claim: Glint is a hypervisor on x86_64. glint-mode.txt may ask for hypervisor (bin/glint-run --mode hypervisor), granted when native mode is granted and SVM is present; otherwise the Mode: line says why. boot/vcpu.cr is the architecture-neutral vCPU interface: run to the next exit, a reason (call, halt, I/O, memory fault, shutdown, invalid state, other), call registers, advance, and the guest's simulated mode from its CPL. boot/svm.cr fills one VMCB, with intercepts for VMRUN, VMMCALL, HLT, shutdown and every I/O port. It sets nested paging over 3.5's guest space with ASID 1, and long-mode guest state at the placed entry. The guest's identity tables are written through translate at guest-physical 0x1000-0x4000, below the 2 MiB image base. boot/svm_x86_64.S saves Glint's registers and loads the guest's around VMRUN. After Guest image:, the boot runs the guest to its first exit and reports it; then the shell starts.

Passage: Hailperin §7.5.2: 'the VMM keeps track of each virtual machine's simulated mode.'

Demonstration: on x86-1, bin/glint-run x86_64 --mode hypervisor --guest build/x86_64/guest/test.efi printed 'Mode: hypervisor' and 'VM exit: call rip 0x201020 call 0x86000001', the test guest's first GLINT_CONSOLE_WRITE, then the shell kept working ('Hello from the ESP!'). With --no-virtualization: 'Mode: native (hypervisor requested; SVM not available)'. spec/vcpu_spec.cr checks VMCB offsets against QEMU 11.1.2 target/i386/svm.h lines, and the guest tables. spec/run/vcpu_spec.cr runs the boots. The vcpu specs and image check: 12 examples, 0 failures, 1 pending (aarch64). Full suite: 1719 examples, 13 failures, 2 errors, 27 pending; every failure is an aarch64 build or glint-build all. Codex wrote it from docs/tasks/4.3b.md. Review changes: CLGI before VMRUN and STGI after it, because #VMEXIT leaves GIF clear and Glint would otherwise run on with interrupts and NMIs globally held; and one wrong comment on CR4.

Size: 327 non-spec lines; largest new function Vcpu.boot, 958 bytes; BOOTX64.EFI 184,832 to 188,928 bytes.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX Leaf check-in: 65add870e8 user: x86-1-glint tags: slice/4.3b

Claim: docs/tasks/4.3b.md has Glint grant hypervisor mode when SVM is present and native is granted. It enters the placed test guest with VMRUN under nested paging over 3.5's guest space, and decodes the first VM exit behind an architecture-neutral vCPU interface that 4.3a implements later. QEMU 11.1.2's svm.h, cpu.h and svm_helper.c stand in for AMD's manual, and the task asks that each offset cite its line.

Passage: docs/WORKFLOW.md, Handing out a slice, step 1; the Phase 4 order note for x86-1.

Demonstration: the exit codes and MSR named were read in QEMU's target/i386/svm.h (lines 114-142) and cpu.h line 571. glint-run's x86_64 CPU is EPYC, with svm=off under --no-virtualization (src/glint/run/runner.cr).

Size: one new task.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TUH8KMXZyLk8eDgCjvQ9hX check-in: d5473c6e89 user: x86-1-glint tags: trunk